1. Field of the Invention
The present invention relates to the reduction of the required amount of signal processing in a modulator/demodulator (modem) which is transferring packet-based data or other information which is intermittent in nature on a communication channel.
2. Related Art
Modern data networks commonly use complex digital signal processing (DSP) devices called modems to transport data over communication channels. Data is typically transported via an analog transmission signal which is representative of a synchronous, constant rate bit stream. This form of communication channel is suitable for the transmission of real-time information such as voice or video. However, it is increasingly common to use modems for the transmission of packet-based information. For example, packet-based information is used to access the Internet and the World Wide Web. However, packet-based information is typically bursty in nature, with an average data rate which is often much less than the available peak data transfer rate of the communication channel.
FIG. 1 is a block diagram of a transmitter circuit 100 of a conventional modem. Transmitter circuit 100 includes packet queue 101, framer 102, channel coding circuit 103, output shaper 104, modulator 105 and digital-to-analog (D/A) converter 106. In accordance with conventional modem protocols, transmitter circuit 100 transforms source data received by packet queue 101 into a continuous time analog transmit signal, which is provided at the output terminal of D/A converter 106.
More specifically, within transmitter circuit 100, the source data is grouped into packets and stored in packet queue 101. These packets are not synchronous with respect to the modem bit clock, but arrive at packet queue 101 at random times. Framer 102 receives the packets from packet queue 101, and in response, composes a continuous bit stream which is synchronous with respect to the modem bit clock. To create such a synchronous bit stream in response to the asynchronous packets, framer 102 generates idle information (i.e., nulls or a marking tone) when no packets are available, and generates packet data when packets are available. The packet data and idle information are delineated in such a way that a receiver circuit of a modem (see, e.g., FIG. 2) can determine where the packet boundaries lie.
The synchronous bit stream generated by framer 102 is then coded by channel coding circuit 103. Channel coding circuit 103 is used to compensate for noise and distortion in the communication channel. Channel coding circuit 103 provides redundant information (e.g., convolutional encoding) to allow for error correction. Channel coding circuit 103 further performs a scrambling function, as well as mapping the coded bit stream onto symbol values. The stream of symbol values generated by channel coding circuit 103 is provided to output shaper 104.
Output shaper 104 digitally filters the stream of symbol values received from channel coding circuit 103. Output shaper circuit 104 limits the frequency bandwidth of these symbol values within a predetermined range and may also be adjusted to help compensate for channel distortion. The filtered sample stream provided by output shaper 104 is provided to modulator 105, which modulates a carrier signal by the filtered sample stream. The output of modulator 105 is provided to D/A converter 106, which generates an analog TRANSMIT signal for transmission on the communication channel (i.e., telephone line).
Transmitter circuit 100 exhibits three distinct disadvantages. First, because transmitter circuit 100 transmits constantly (either packet data or idle information), a modem can be functionally connected to only one telephone line at any given time. Moreover, only a small percentage of the total information carrying capacity of the communication channel is used to transmit data, while a large percentage of this capacity is used to transmit idle information. Additionally, transmitter circuit 100 is unsuited to multi-drop operation on a single communication channel. The first disadvantage mentioned above is particularly deleterious where a number of xDSL modems are collected together in a central office to provide data communications to a number of remote locations. In this case, each remote location requires a dedicated xDSL modem in the central office.
The analog TRANSMIT signal is transmitted over the telephone line to the telephone company central office. Within the central office, an analog to digital converter converts the analog TRANSMIT signal into a digital signal. This digital signal is multiplexed onto a digital backbone circuit and routed to a second central office location. The digital signal is demultiplexed within the second central office location and routed over a digital trunk to a digital server which performs additional processing on the digital signal.
FIG. 2 is a block diagram of a receiver circuit 200 of a conventional modem. Receiver circuit 200 includes analog-to-digital (A/D) converter 201, resampler 202, equalizer 203, carrier recovery circuit 204, symbol decision circuit 205, channel decoding circuit 206, framer 207, packet queue 208, echo canceler 209, timing update circuit 210, equalizer update circuit 211 and carrier update circuit 212. Carrier recovery circuit 204 and symbol decision circuit 205 are sometimes referred to as a demodulator circuit. A/D converter 201 is coupled to the telephone line to receive the analog signal from the telephone company central office. A/D converter 201 samples this analog signal, thereby converting the analog signal into a digital signal.
The modem which includes receiver circuit 200 also includes a transmitter circuit (i.e., a near end transmitter circuit, not shown) which is similar to transmitter circuit 100. During full duplex operation, this near end transmitter circuit may be generating a TRANSMIT signal at the same time that receiver circuit 200 is attempting to receive the analog signal from the remote (or far end) transmitter circuit 100. Under these conditions, receiver circuit 200 may receive an echo of the TRANSMIT signal. Echo canceler 209 generates a signal which is a replica of this echo. The signal generated by echo canceler 209 is then subtracted from the output signal provided by A/D converter 201.
Resampler 202 adjusts the raw input samples received from A/D converter 201 to match the symbol rate of the transmitter circuit 100. Timing update circuit 211 extracts timing information which is used to control resampler 202. Equalizer 203 compensates for linear distortions introduced by the communication channel (e.g., the telephone line). Carrier recovery circuit 204 extracts the carrier signal from the received signal and provides rough symbols (or a soft symbol decision) to symbol decision circuit 205. Symbol decision circuit 205 quantizes the rough symbols and makes hard decisions as to the identity of the received symbols. Equalizer update circuit 211 and carrier update circuit 212 receive the symbols provided by symbol decision circuit 205. In response, equalizer update circuit 211 and carrier update circuit 212 determine quantizer error. In response to this quantizer error, equalizer update circuit 211 and carrier update circuit 212 adjust the coefficients used by equalizer 203 and carrier recovery circuit 204, respectively, thereby improving the accuracy of subsequent hard symbol decisions.
Channel decoding circuit 206 uses redundant information present in the received analog signal to correct for quantizer errors. Channel decoding circuit 206 typically implements a maximum likelihood sequence estimator (MLSE) circuit (such as a Viterbi decoder or other form of error correction. Channel decoding circuit 206 provides a decoded bit stream to framer 207. Finally, framer 207 decodes the bit stream into packet data, discarding the idle information, and loading the packets of data into packet queue 208.
The operation of receiver circuit 200 is significantly more complex than the operation of transmitter circuit 100. Substantial signal processing is performed by receiver circuit 200, typically many hundreds or thousands of operations per symbol processed. Much of the signal processing is concentrated in equalizer 203, echo canceler 209, and channel decoding circuit 206. A significant percentage of this signal processing is dedicated to the processing of the idle information generated by transmitter circuit 100.
It would therefore be desirable to have a modem system which is capable of utilizing a greater percentage of the information carrying capacity of the telephone line to transfer packet based data. It would also be desirable to have a modem system which minimizes the signal processing which must be dedicated to the processing of idle symbols. It would further be desirable to have a modem system which enables a common modem to be functionally connected to a plurality of telephone lines at the same time. It would further be desirable to have a modem system which enables a common telephone line to be used with a plurality of modems in a multi-drop configuration.